SOC-02 – Embedded Software Development for Altera® SoCs

Course Description

This comprehensive course provides embedded software engineers, hardware engineers, firmware developers, and system architects with an end-to-end, hands-on mastery of software development for the Hard Processor System (HPS) embedded in Altera SoC FPGA devices — including the Cyclone V SoC, Arria V SoC, Arria 10 SoC, and Agilex SoC families.

The course is structured in three progressive tiers: 

• Foundation: Altera SoC architecture, boot flow, the ARM toolchain, the bare-metal development environment, linker scripts, ARM MMU & cache management, interrupt handling, and robust fault management.
• Integration & Production: HPS peripheral drivers, HPS-FPGA bridge interfacing and custom IP integration, DMA-optimised data movement, FreeRTOS multi-task development, Zephyr RTOS, U-Boot customisation, device tree authoring, and Linux kernel driver development.
• Optional — Hardware/Software Co-Design: System partitioning methodologies, FPGA fabric accelerator design using RTL and HLS, advanced AXI communication fabrics and DMA, UIO/VFIO user-space drivers, oneAPI FPGA compute, multi-core AMP partitioning with OpenAMP, functional-safety considerations, and full-stack co-design validation.

Course Duration: 2 Days