SoC, HPS and Embedded Design

Course Description This comprehensive course provides embedded software engineers, hardware engineers, firmware developers, and system architects with an end-to-end, hands-on mastery of software development for the Hard Processor System (HPS) embedded in Altera SoC FPGA devices — including the Cyclone V SoC, Arria V SoC, Arria 10 SoC, and Agilex SoC families. The course is […]

Course Description This course is the definitive program for engineers who need to master the complete Embedded Linux software stack on Altera SoC FPGA platforms. Students progress systematically from the fundamentals of the Hard Processor System (HPS) architecture, through every stage of the boot chain (BootROM, FSBL/SPL, ARM Trusted Firmware, U-Boot), across the Linux kernel […]

Course Description This course is built for Altera® SoC FPGA designers who want to develop deterministic, production-grade real-time systems using Zephyr RTOS on Altera SoC FPGA platforms. The course focuses on real-world Zephyr practices for HPS + FPGA systems: board/BSP bring-up, Zephyr device tree and driver model, interrupt and scheduling determinism, DMA and cache/coherency correctness, […]

Course Description This course provides a comprehensive introduction to the Altera Nios V soft-core processor and its ecosystem. Nios V is the next-generation RISC-V based soft-core processor for Altera FPGAs, replacing the legacy Nios II architecture. Students will gain both theoretical understanding and hands-on experience designing, configuring, and programming Nios V-based embedded systems on Altera […]