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Home > IP and Use of Class Materials Provided

IP and Use of Class Materials Provided

Accepted terms when accessing or using materials.

Intellectual Property and Use of FPGA / SoC Materials

Intellectual Property Rights

Ownership of Materials

All training materials provided in connection with our courses including but not limited to FPGA and SoC labs, RTL/HDL code (Verilog, SystemVerilog, VHDL), scripts, reference designs, block diagrams, IP examples, firmware, documentation, recordings, slides, and instructional content are the exclusive intellectual property of FPGA Authority Inc. or its licensors.

Nothing in these Terms grants ownership rights to the student.

Limited License for Educational Use

Upon full payment and enrollment, students are granted a limited, non-exclusive, non-transferable, revocable license to use the provided materials solely for personal educational and internal professional development purposes.
This license:

  • Applies only to the registered student
  • Is valid only for the duration of the course and any explicitly stated access period
  • Does not transfer to other individuals or organizations

Restrictions on Use

Unless explicitly authorized in writing, students may not:

  • Copy, reproduce, distribute, publish, or share course materials
  • Upload labs, RTL, or code examples to public or private repositories (e.g., GitHub, GitLab, Bitbucket)
  • Use course materials to create derivative training content or competing courses
  • Sell, sublicense, or commercially exploit any portion of the materials
  • Share login credentials or grant third-party access to labs or virtual environments

Use in Commercial or Production Designs

Course materials and example designs are provided for instructional purposes only.

While students may apply general knowledge and concepts learned during training, direct reuse of provided FPGA/SoC lab code, reference designs, or IP blocks in commercial or production systems is prohibited without prior written permission, unless otherwise stated.

Confidential and Proprietary Content

Certain training materials may be considered confidential or proprietary, particularly advanced FPGA architectures, SoC integration examples, performance-optimized RTL, or tooling workflows. Students agree to treat such materials as confidential and take reasonable steps to prevent unauthorized disclosure.

FPGA Vendor IP and Third-Party Components

Some training materials may reference or include vendor provided tools, IP, or examples (e.g., Altera® FPGA reference designs). Ownership of such materials remains with their respective rights holders and is subject to applicable vendor license agreements.

Students are responsible for complying with all third-party license terms.

Recordings and Screenshots

Students may not record, screen-capture, photograph, or otherwise reproduce live sessions, labs, demonstrations, or shared content without prior written consent.

Enforcement and Remedies

Unauthorized use, duplication, distribution, or disclosure of course materials may result in:

  • Immediate termination of course access
  • Revocation of licenses granted under these Terms
  • Denial of refunds beyond the stated refund policy
  • Potential legal action to protect intellectual property rights

Survival

All intellectual property obligations survive course completion, withdrawal, or termination of access.

Contact Us

If you have any questions, please contact us at:

Email: [email protected]

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